Leveraging Reconfigurablity and Heterogeneity for Next-Generation Computing Systems
Abstract: Since the invention of microprocessors in the early 1970s, the performance evolution of computing systems has been driven by integration improvements in complementary metal–oxide–semiconductor (CMOS)technology. Unfortunately, CMOS transistor scaling will come to an end within a decade, and no alternative switching technology is expected to be ready for deployment in a timely manner. A radical paradigm shift in computer architecture therefore is needed. Heterogeneity and reconfigurability are keys to improving both performance and energy efficiency. However, they pose significant challenges to programmability and usability because existing programming languages and system software stacks are designed for non-reconfigurable computing architecture or instruction-set architecture.
In this talk, I will first present a summary of high-level synthesis (HLS) technology, in particular OpenCL, for field-programmable gate arrays (FPGAs), one of the most practical reconfigurable architectures today. I will then present performance and energy efficiency results obtained from the current generation of FPGA platforms on numerical simulation, data analytics, and machine learning and deep learning applications; and I will discuss next-generation FPGA platforms. In addition, I will talk about the possibility of integrating HLS FPGA designs into data acquisition systems in order to enable direct computation.