Scalable Support for Controlled Data and Resource Sharing
In this talk, I will describe our efforts to improve the scalability, efficiency, and ease of use of emerging, increasingly concurrent, multicore- and accelerator-based hardware. I will begin by showing how we leverage application-specific behavior to design an efficient memory hierarchy. I will describe two ideas: application-specific sharing pattern-based coherence to achieve metadata compression for improved scalability in coherence management; and variable cache line granularity to reduce waste in the cache hierarchy. I will then describe several architectural mechanisms we have designed to handle common time-critical operations useful to a variety of applications memory monitoring, programmable data isolation, and fine-grain protection.
I will demonstrate their utility for one application, transactional memory, which has emerged as an attractive mechanism for easing the creation of parallel code. Finally, as time permits, I will highlight the key issues we have addressed in controlling resource allocation and sharing at the runtime/operating system level in order to effect performance isolation.