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Seminar | Center for Nanoscale Materials

Fine-Pitch (<40 μm) Integration Platform for Flexible Hybrid Electronics using Fan-Out Wafer-Level Packaging

NST Seminar

Abstract: A flexible fan-out wafer-level packaging (FOWLP) process for heterogeneous integration of high-performance dies in a flexible and biocompatible elastomeric package (FlexTrateTM) was used to assemble 625 dies with co-planarity and tilt < 1 μm, average die-shift of 3.28 μm with σ < 2.23 μm. Fine-pitch Interconnects (40-μm pad pitch) were defined by using a novel corrugated topography to mitigate the buckling phenomenon of metal films deposited on elastomeric substrates. Corrugated interconnects were then used to interconnect 200 dies and tested for cyclic mechanical bending reliability, showing <7% change in resistance after bending down to 1 mm radius for 1,000 cycles. Two application will be demonstrated: (1) A highly flexible (1-mm bending radius) 7-segment display using 42 high-power InGaN LED dies integrated in a 50×40-mm package and (2) a near-field wireless implantable optogenetic implant system on an ultraflexible (~5-mm bending radius) package using commercially available dies showing power transfer efficiency >15% at a 1-cm transmit distance.