Abstract: Spintronics promises intriguing device paradigms where electron spin is used as the information token instead of its charge counterpart. The application of spintronic devices as an alternative to CMOS technology for ultralow-power nonvolatile logic and memory requires versatile, scalable device design that is adaptable to emerging material physics.
In this talk, I will show a proof-of-concept demonstration of spin transfer torque driven domain wall devices for logic-in-memory applications, discuss the experimental challenges, and outline the methodology to improve their energy efficiency and speed. The switching speed, which is a major bottleneck fo rthese devices, can be significantly improvde by implementing antiferromagnetically coupled materials in the active layer. The mutual interactions among antiferromagnetic ordering, Dzyaloshinskii-Moriya interaction, and spin orbit torque play a central role in the current-induced domain wall motion in those materials.
Finally, I will show a novel application of the domain wall devices as building blocks for an artificial neural network (i.e., synaptic weight generator and arbitrary nonlinear transfer function generator for deep learning). In this type of device, the correlation length of the edge roughness of nanowires defines the resolution of the domain wall motion and determines the number of bits in the weight-determining resistor. Integrating these analog synaptic devices and function generators with CMOS technology may provide significant acceleration for deep convolutional neural networks.